Single-ended output driver circuits are often used to provide output signals at output pads of electronic devices. In this regard, output driver circuits typically includes drive transistors connected to output pads. Analog reference voltages applied to the gates of the drive transistors can facilitate precise control of the current delivered by the drive transistors and can be used to maintain drive strength (e.g., a constant 8 mA current drive) or adjust slew rates (e.g., faster or slower) of the drive transistors. These reference voltages are typically generated for distribution to a large group of output driver circuits.
Unfortunately, as the drive transistors switch to provide different voltages at the output pads, large amounts of noise can couple onto the gates of the drive transistors. This noise can disturb the global reference voltages to the point where they provide no control benefit to the drive transistors, or can even cause the driver transistors to malfunction.
One approach to reducing the effects of this noise involves the use of buffers such as source-follower amplifier stages or unity-gain buffers connected between the reference voltages and the driver transistors. These buffers typically consume a constant DC current (e.g., between approximately 200 μA and 2 mA per output driver), regardless of whether or not the driver transistors are switching. However, for implementations with large numbers of output drivers, the output buffers can significantly increase the current consumption of the output driver circuitry.
In a second approach, switches and delay elements may be used with the buffers to reduce the power consumed by the output buffers. In this second approach, delay elements may be used to power down the buffers after a time period during which most of the noise associated with a switching driver transistor has settled. For example, such switching may occur approximately 4 ns after a driver transistor has switched on. Switches may be used to directly connect the reference voltage to the driver transistors following this time period.
Although this second approach may reduce DC current consumption by the buffers to a period of approximately 4 ns (e.g., consuming approximately 1 mA to 3 mA depending on drive strength), additional layout area is required to implement the additional switches and delay elements. This can significantly increase the size of the output driver circuitry. For example, in one implementation, the output buffers may comprise approximately 232 square microns, and the switches and delay elements may comprise an additional approximately 950 square microns.
Accordingly, there is a need for an improved output driver circuit to buffer reference voltages provided to driver transistors that does not consume excessive current. In addition, there is also a need for an output driver circuit that performs such buffering without requiring a large chip area for implementation.